Circuit emulation is a known technology where a data stream of a constant fixed rate is broken into data packets on a transmitting end of the network, then transmitted over the network with unpredicted timing in a bursting fashion. On the receiving end the arriving data packets are typically buffered into a sufficiently large memory. The desired outgoing bit stream constant-rate is then recovered and continually adapted to the overall incoming data rate actually representing the averaged received data rate over a wide period of time. This function is commonly referred to as circuit emulation clock recovery.
Methods and circuitry for implementing such clock recovery functionality are well known and commonly applied. Such conventional schemes, however, require instantiating a clock-recovery module for every channel. Conventional schemes for applying clock recovery for handling massive multiple channels is costly and inefficient.